Field of the Invention
Embodiments of the present invention generally relate to video coding and more specifically relate to processor instructions designed to accelerate video coding.
Description of the Related Art
Video coding standards such as H.264/AVC and H.265 (commonly referred to as High Efficiency Video Coding (HEVC)) include an independent coding unit referred to as a slice to support low latency encoding and decoding and to provide better transmission error resiliency. The H.264 standard is described in ITU-T Recommendation H.264: Advanced Video Coding for Generic Audiovisual Services and the HEVC standard is described in ITU-T Recommendation H.265: High Efficiency Video Coding (HEVC), both of which are incorporated by reference herein.
A slice, which may be a portion of a picture or the entire picture, includes a header and payload video data. In many video streams, the slice header is relatively simple and can be decoded in real-time on a standard embedded RISC processor. However, the worst case slice headers permitted by the video coding standards are complex and real-time decoding of such headers is beyond the capacity of most embedded RISC processors. Hardwiring of slice processing control logic is potentially helpful but such hardwiring reduces the ability to tune the decoder for error conditions—an important differentiator for the end user.